1. Field of the Invention
The present invention relates to a device and method for generating an auto gain control (AGC) signal in a digital TV receiver using a vestigial sideband (VSB) method.
2. Description of the Related Art
A digital TV makes users feel as if they were in theaters. That is, as compared with a general analog TV, the digital TV has a high resolution (for example, 1080xc3x971920) and a wide screen in a lateral direction (16:9, to maximally apply an aspect ratio of movies such as 4:3, 5:3, 1.85:1, 2.4:1, etc.), and provides a CD level sound through a multi channel (maximally 5.1 channel).
The countries worldwide including the USA, Europe and Japan have been standardizing the digital TV by preparing their own broadcasting methods and standards. For example, the USA has introduced a vestigial sideband (VSB) method suggested by Zenith as a transmission format, an MPEG as a video compression format, a Dolby AC-3 as an audio compression format, and a display method compatible with a general display method as a display format.
On the other hand, a gain magnitude of a signal from a transmitter is constant, but may be varied by a distance from the transmitter to the receiver and various kinds of channels. Accordingly, the signal with a varied gain is inputted to the receiver. However, most of the digital sections of the receiver are designed, presuming that the signal having a constant gain is inputted. Therefore, it is required to convert an analog signal inputted to the receiver into a digital signal, after controlling a gain of the analog signal to have a constant magnitude. Here, a signal level of a transmission terminal may be smaller or greater than a signal level of a reception terminal according to a transmission or reception power, and thus it is necessary to control the gain.
The gain control operation is performed by an auto gain control (AGC) device. The AGC device judges a gain of the current input signal on the basis of an average or power of the input signals. Thereafter, the AGC device controls an analog amplifier between an RF terminal and an IF terminal according to the resultant gain, so that the signal can have a wanted magnitude.
A delayed AGC method as shown in FIG. 1 has been widely employed as a transmission method.
Firstly, when a VSB modulated RF signal is inputted through an antenna 101, a tuner 102 selects a frequency of a wanted channel by tuning, and converts the frequency into an IF signal. A demodulator 103 is used to exactly restore a base band signal from the IF signal.
The analog base band signal restored in the demodulator 103 is inputted to an A/D converter 104. The A/D converter 104 converts the analog signal into a digital signal, and outputs the digital signal to a digital processor 105 and an AGC signal generator 106. In addition, the demodulator 103 increases or decreases the gain according to gain control signals GainUp, GainDn fed back from the AGC signal generator 106.
The digital processor 105 equalizes the digital signal from the A/D converter 104 in order to correct linear distortion of an amplitude causing interference between symbols and ghost generated due to reflection to buildings or mountains. Thereafter, the digital processor 105 corrects errors of the digital signal generated through a transmission channel, and outputs the digital signal to a video decoder 107. The video decoder 107 decodes the error-corrected signal by the MPEG algorithm, converts the decoded signal into a visible signal, and outputs it to a display device 108.
On the other hand, the AGC signal generator 106 judges the gain magnitude of the currently inputted digital signal, and feeds back the gain up control signal GainUp for increasing the gain of the input signal or the gain down control signal GainDn for decreasing the gain of the input signal to the demodulator 103, thereby adjusting the gain of the analog signal inputted to the A/D converter 104 to have a wanted magnitude. In order to control the actual gain, the receiver is set to have a maximum gain in a power on or channel change operation, and the demodulator 103 firstly controls the gain according to the gain magnitude of the input signal.
When the demodulator 103 is not able to control the gain, if an output signal from the A/D converter 104 does not have a wanted magnitude, the demodulator 103 transmits the delayed AGC signal to the tuner 102, controls the gain of the tuner 102, and thus constantly maintains the gain of the input signal.
Here, the AGC signal generator 106 which is the most important unit of the AGC device judges whether to increase or decrease the gain of the input signal.
FIG. 2 is a detailed block diagram illustrating a conventional AGC signal generator. The AGC signal generator judges the gain of the input signal on the basis of an average of the input signals to an absolute value, and generates the gain up/down signal GainUp/Dn to control the gain of the input signal.
That is, an absolute value calculator 201 calculates an absolute value of the inputted digital signal, and transmits the absolute value to an integrator 202. So as to compute an average of the output signals from the absolute value calculator 201, the integrator 202 performs integration in predetermined units, and outputs a resultant value to an average calculator 203. At this time, the absolute value of the input signal is calculated, instead of squaring the input signal. As a result, the output bit from the absolute value calculator 201 is reduced more than the input bit by one bit.
The average calculator 203 calculates the average of the input signals to the absolute value according to the output from the integrator 202, and generates the gain control signal GainUp/Dn to adjust the average to a wanted value. The gain control signal GainUp/Dn is transmitted to the demodulator 103, and controls the gain magnitude of the signal inputted to the A/D converter 104.
FIG. 3 is a detailed block diagram illustrating the integrator 202. A subtracter 301 outputs a difference between the input signal and a presumed average. An adder 302 adds the difference signal to an output from a buffer 303, outputs the resultant value to the average calculator 203, and feeds back it to the buffer 303. Here, the receiver is designed, presuming that the gain magnitude of the input signal is always constant. Accordingly, the receiver can presume the average by the gain magnitude.
At this time, the buffer 303 is reset once in an initial stage of the operation. An integral value for the gain is increased to infinity by repeated integration. It is thus impossible to embody the integrator 202 as an actual hardware.
Therefore, the subtracter 301 is positioned before the adder 302 to subtract a wanted average from the input signal, and then the integration is performed, thereby remarkably reducing the integral value. Accordingly, it considerably reduces a load in hardware constitution of the integrator 202.
However, in the case of the integrator shown in FIG. 3, the buffer 303 is reset once in the initial stage of the operation, and thus the integral value is increased when the gain of the input signal is very different from the wanted gain.
The present invention is proposed to solve the foregoing problems, and it is therefore an object of the invention to provide a device and method for generating an auto gain control (AGC) signal which can obtain a signal having a constant magnitude, by repeatedly resetting an integrator.
Another object of the present invention is to provide a device and method for generating an AGC signal which can facilitate reception of the AGC signal when a fast moving substance exists on a channel, by improving a speed of the AGC signal.
In order to achieve the above-described objects of the present invention, there is provided a device for generating an AGC signal, including: an A/D converter for converting an inputted analog signal into a digital signal; an integrator for calculating an absolute value of the output from the A/D converter, subtracting a predetermined average from the absolute value, adding the resultant value to a preceding integral value, and being reset at predetermined intervals; a frequency divider for calculating an average of the output from the integrator, and removing a predetermined number of low bits proportional to the integral time; an up/down signal generator for generating an up/down signal for controlling a gain according to the output from the frequency divider; and a gain converter for storing information used to control the gain from the initial stage of the system operation, adding the information to the information of the up/down signal from the up/down signal generator, and controlling a gain of the analog signal inputted to the A/D converter.
The integrator includes: an absolute value calculator for calculating an absolute value of the inputted digital signal; a subtracter for subtracting a predetermined average from the absolute value; an adder for adding the output from the subtracter to a preceding integral value; a first storing unit repeatedly reset according to a repeated reset signal, for storing the output from the adder, and feeding back the stored value to the adder as the preceding integral value; and a second storing unit enabled according to the repeated reset signal, for storing a value from the adder just before the first storing unit is reset.
The up/down signal generator converts the output from the frequency divider into sign and magnitude information, decides a gain control direction according to the sign information, squares the magnitude information, and decides a gain control amount according to the squared magnitude information.
In addition, there is provided a device for generating an AGC signal, including: an A/D converter for converting an inputted analog signal into a digital signal; an integrator for calculating an absolute value of the output from the A/D converter, subtracting a predetermined average from the absolute value, adding the resultant value to a preceding integral value, and being reset at predetermined intervals; a frequency divider for calculating an average of the output from the integrator, and removing a predetermined number of low bits proportional to the integral time; a conversion and square unit for obtaining sign and magnitude of the signal from the frequency divider, and squaring the magnitude; an up/down signal generator for generating an up/down signal for controlling a gain according to the sign and squared magnitude information from the conversion and square unit; and a gain converter for storing information used to control the gain from the initial stage of the system operation, adding the information to the information of the up/down signal from the up/down signal generator, and controlling a gain of the analog signal inputted to the A/D converter.
The period of the repeated reset signal inputted to the integrator is shortened.
There is also provided a method for generating an AGC signal, including the steps of: (a) converting an inputted analog signal into a digital signal; (b) resetting at predetermined intervals, calculating an absolute value of the output of step (a), subtracting a predetermined average from the absolute value, and adding the resultant value to a preceding integral value; (c) calculating an average from the output of step (b), and removing a predetermined number of low bits proportional to an integral time; (d) generating an up/down signal for controlling a gain according to the output of step (c); and (e) storing information used to control the gain from the initial stage of the system operation, adding the information to the information of the up/down signal from step (d), and controlling a gain of the analog signal inputted to step (a).
The present invention aims to rapidly respond to gain variations on the channel, without reducing performance of the receiver.